From 4fe64c10cb285a270ba9a7b630ed33b009f0c633 Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Mon, 20 Oct 2008 15:11:19 +0100 Subject: [PATCH] NMI watchdog: don't try to run too slow. The way MSR writes of performance counters works means that Intel CPUs running faster than about 2.1GHz can't set the NMI timer to 1Hz. Signed-off-by: Tim Deegan --- xen/arch/x86/nmi.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index 47e53b2a2a..edc323cd38 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -122,10 +122,17 @@ int __init check_nmi_watchdog (void) printk("\n"); - /* now that we know it works we can reduce NMI frequency to - something more reasonable; makes a difference in some configs */ + /* + * Now that we know it works we can reduce NMI frequency to + * something more reasonable; makes a difference in some configs. + * There's a limit to how slow we can go because writing the perfctr + * MSRs only sets the low 32 bits, with the top 8 bits sign-extended + * from those, so it's not possible to set up a delay larger than + * 2^31 cycles and smaller than (2^40 - 2^31) cycles. + * (Intel SDM, section 18.22.2) + */ if ( nmi_watchdog == NMI_LOCAL_APIC ) - nmi_hz = 1; + nmi_hz = max(1ul, cpu_khz >> 20); return 0; } -- 2.30.2